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Home > Other > Software and hardware design scheme for implementing VoIP controller b

Software and hardware design scheme for implementing VoIP controller based on AN2131QC chip

Ora pubblicata: 2020-05-26 15:10:34

Introduction

VoIP refers to technology that encodes, compresses, and subcontracts voice signals, and transmits them through an IP network to achieve computer-to-computer, ordinary telephone, ordinary telephone, and voice communication between the computer and ordinary telephone. The advancement of modern digital signal processing technology and voice compression coding technology has technically ensured the feasibility of IP phone transmission on the Internet; and the promulgation of the H.323 standard and the application of the SIP protocol have enabled the rapid development of IP voice services on the Internet Launched, and is expected to become a core and key technology. The economics of this communication method and the characteristics of soft switching make it have very broad development prospects.

The USB interface is a new interface technology applied in the computer field. It was first proposed by Compaq, Intel, Microsoft and other companies in November 1994. Its purpose is to replace the existing peripheral interfaces of the PC with USB. The connection of peripheral equipment has the characteristics of simplification, plug and play, hot plug, high speed and easy expansion. The VoIP controller (phone) based on the USB interface of the PC terminal introduced in this article is realized by using the characteristics of the USB interface.

1. Scheme design of VoIP controller

The realization of this machine includes hardware design and software programming.

1.1 Overall hardware solution

The VoIP controller call is realized through the USB interface, so the hardware mainly includes the USB interface chip AN2131QC, the voice processing chip MCl45483, and also includes the dialing keyboard part, the display part, the power processing part, etc. Show. Among them, the dialing keyboard mainly adopts the coding method, and the key information is obtained through the I / O detection of AN2131QC. The display part is a liquid crystal display, which can display information such as call number, call status, time, date and day of the week. The main function of the serial EEPROM is to store manufacturer information, product information, and device information. When power is on, if the core of the main control chip detects that the EEPROM is connected to the I2C bus, it will process the information first.

Figure 1 Block diagram of hardware framework

1.2 AN2131QC chip application introduction

The control chip selected in this design is the EZ_USB series AN2131QC. This chip provides a RAM-based solution that allows unlimited settings and upgrades, and supports the transmission of full-speed USB bus throughput. A large number of auxiliary instructions are provided in the chip core, which simplifies coding and also accelerates the development of USB features. The simplified structure of the chip is shown in Figure 2. There is a core inside AN2132QC: it consists of serial interface engine (SIE) and USB interface. SIE is responsible for data exchange with USB transceivers and USB interfaces to realize serial data encoding / decoding, error control, bit filling and other functions related to the USB protocol.

Figure 2 AN213QC simplified structural block diagram

1.3 Introduction to MCl45483 Voice Chip Application

Speech coding is also one of the key parts of this design. The choice of the voice codec chip is MC145483. The characteristics of this chip are mainly reflected in the 13-bit linear PCM encoding / decoding filter with 2 s compensation to realize the digitization and reconstruction of the voice signal; the operating voltage is 3 V and the power consumption is 8 mW, standby power consumption is only O.01 mW, only a single power supply is needed, so the power supply interference problem caused by dual power supply is reduced, and the voice quality is improved; the chip can also adjust the gain, the design is simple, specific The implementation is shown in Figure 3. This design can well meet the requirements of the high-quality voice encoding / decoding function of the VoIP controller.

Figure 3 The specific implementation circuit of the voice part

2. Design and implementation of software functions

2.1 AN2131QC USB bootstrapping

When the AN213lQC chip is reset (RESET), the AN2131QC will bootstrap to check the presence of the EEPROM on the I2C bus. If EEPROM is detected, bootstrapping will first read the first byte of EEPROM to determine the enumeration mode. The different enumeration modes are determined by the value of the first byte of EEPROM, as listed in Table 1.

The first byte of EEPROM
AN2131QC Nuclear action
Not OxBO
Or OxB2

Provide descriptors from AN2131QC, PID / VID / DID , set ReNum = 0
OxB2
Provide descriptors from AN2131QC, PID / VID / DID from EEPROM, set ReNum = 0
OxB2
Load EEPROM into the RAM of AN2131QC, set ReNum = 1; the descriptor is provided by 8051,PID / VID / DID

Before reading the first byte of the EEPROM, the boot counter must set the address counter of the EEPROM to 0. It selects EEPROM by sending a control byte, followed by an O address to set the internal EEP-ROM address pointer to 0. Then it sends a control byte and starts reading the first EEPROM byte.

2.2 USB transmission of AN2131QC

The USB transmission of AN213lQC is divided into block transmission, control transmission and interrupt transmission.

The maximum data packet size allowed by the USB specification for block transfer is 8, 16, 32, and 64 bytes, and the interrupt data is 1 to 64 bytes. AN2131QC provides 8 IN endpoints and 8 OUT endpoints, each of which has a maximum buffer space of 64 bytes. Among them, the 2nd, 4th, 6th IN and OUT endpoints can provide double buffers with the immediately following endpoints, allowing 8051 to process one data packet while another data packet is transmitted on the USB bus, that is, 6 "endpoint pairs" (USBPAIR register) controls double buffering. 805l did not set 14 endpoint valid bits during initialization, and informed AN213l which endpoint is valid for QC core. By default, the endpoint O is always valid, and the block data appears in RAM. Each block endpoint reserves 64 bytes of RAM space, a 1-bit count register, a 2-bit control and status register. The 8051 can read a bit in the status register to determine whether the endpoint is "busy". When the "busy" bit of the endpoint is set, the 8051 will not be able to read and write endpoint buffers and byte count registers. When an endpoint is ready for 8051 operation, AN2131QC sets an interrupt request bit. AN2131QC vector interrupt system according to the endpoint automatic transmission control, separate the interrupt request from the interrupt service subroutine to respond to the endpoint request service.

Endpoint O is the only control endpoint in the AN2131QC chip. Although the control endpoint is bidirectional, AN2131QC still provides two 64-byte buffers INOBuF and OUToBUF. In addition, there is an additional 8-byte buffer, which is unique to the endpoint O. This buffer holds the data when the SETUP phase arrives during the control transmission.

Interrupt transfer is a special kind of block transfer. AN2131QC control endpoint O receives a special SETUP token, which is a host used to handle the transmission of device control signals. The host passes the endpoint. Send a series of standard equipment request forms.

2.3 Chip firmware program

The firmware program of AN2131QC chip controls the operation of the entire hardware system. When powered on or connected, it will be automatically downloaded to the chip's RAM, which is executed by 8051. 

2.4 Driver

Two driver programs are needed: one is dedicated to download the firmware program of the chip, and the other is used to realize the function of receiving / transmitting USB data and voice data processing on the PC side. The downloaded application driver contains the entry program, plug-and-play program, power management program, and uninstallation program required by the WDM driver; the USB data transceiver function and voice data processing driver mainly implement USB data reception, transmission, and voice information Treatment. These two programs need to be loaded on the PC when using the controller for the first time.

3. The main advantages of this design

◇ Follow USB1.1 standard, no sound card and no external power supply required.

◇ Compatible with H.323, MGCP and SIP protocols.

◇ With LCD display screen and VoIP caller ID display function.

◇ Using echo cancellation and noise suppression technology.

◇ Adopt full-duplex communication technology.

4. Conclusion

This article mainly introduces the hardware and software design scheme of the VoIP handle based on the USB interface, and gives a more detailed introduction to the USB interface communication method. The H.323 and SIP protocols and service quality control strategies are implemented on the computer side to ensure the call quality. As computers and Internet networks enter every home, VoIP telephone technology must have broad development prospects, and people will get more convenient and economical communication services.

Etichetta: AN2131QC
 

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