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Home > Interface/Bus/Driver > Research on Implementation of Communication Function Based on MILSTD15

Research on Implementation of Communication Function Based on MILSTD1553B Data Bus

Ora pubblicata: 2020-03-19 11:11:20

At present, with the progress of technology and technology, the development of integrated circuit technology has made it possible to integrate a programmable system (Programmable System ON a Chip, PSOC) on a chip. Among them, Field Programmable Gate Array (FPGA) is widely used in the design of mathematical application-specific integrated circuits due to its flexible design and fast speed. The theory and implementation of digital signal processing (DSP) has achieved rapid development and has become one of the fastest-growing disciplines in the contemporary era. Because of its high-speed processing speed and powerful and flexible interface and communication capabilities, it has been widely used in many fields.

The MILSTD1553B data bus has bidirectional output characteristics, high real-time performance and high reliability, and is widely used in contemporary transport aircraft and a considerable number of civil aviation passenger aircraft and military aircraft.

1, 1553B data bus system structure

1553B bus system is mainly composed of 3 parts: bus controller BC; remote terminal RT; data bus Data Bus.

2. 1553B data bus communication protocol

The operating frequency of the 1553B bus is 1 Mb / s. Using Manchester II code, half-duplex working mode. The main hardware components are the bus controller (BC), remote terminal (RT), and optional bus monitor (MT). Under normal circumstances, these 3 parts are completed through a multiple bus interface (MBI). MBI can be embedded in the computer. The bus has 10 message formats. Each message contains at least 2 words, each word has 16 message bits, a parity bit and a 3-bit sync header. All message words are constructed using Manchester II code.

The 1553B data bus uses a command / response type communication protocol. He has 3 types of terminals:

(1) Bus controller (BC)

He is the only terminal on the bus that is arranged to perform setup and start data transfer tasks.

(2) Remote terminal (RT)

He is the interface from the user subsystem to the data bus. He fetches or absorbs data under the control of the BC.

(3) Bus monitor (MT)

He "monitors" the information transmission on the bus to complete the recording and analysis of the data sources on the bus, but he does not participate in the communication of the bus itself.

3, 1553B data bus message transmission format

The transfer of information on the 1553B bus is based on messages. All messages are composed of data words, instruction words, and status words.

4. Communication hierarchy structure of a certain aircraft bus system

Referring to ISO's seven-layer model of open interconnection system, an aircraft's airborne system is divided into 5 layers: application layer, driver layer, transmission layer, data link layer and physical layer.

The functional division between these five layers is clear, and the interface is simple, thus laying a good foundation for the design and implementation of hardware and software. The application layer is the highest level of the communication system. It implements the communication system management functions (such as initialization, maintenance, and reconstruction) and interpretation functions (such as describing the meaning, validity, scope, and format of data exchange).

The driver layer is the software interface between the application layer and the lower layers. In order to achieve the management function of the application layer, the driver layer should be able to control the initialization, start, stop, connection, disconnection, and start of self-test of the multiplex bus interface (referred to as MBI) in the subsystem, monitor its working status, control its System host data exchange.

The transport layer controls data transmission on the multiplexed bus. The tasks of the transport layer include information processing, channel switching, and synchronization management.

The data link layer controls the transmission sequence of each message on the bus in accordance with MILSTD1553B.

The physical layer handles bit stream transmission on the physical medium of the 1553B bus in accordance with MILSTD1553B.

The application layer and driver layer are implemented on the host of each subsystem, and the transport layer, data link layer, and physical layer are implemented on MBI.

5.Bus system communication software design

In the design of a certain aircraft aviation bus system, a very important task is the design of bus communication software. Aviation bus communication software design includes: software design of driver layer and application layer. Among them, the driver layer directly drives the bus interface board to complete the configuration of each register to realize the sending and receiving of data. The application layer is the highest layer in the design, and it manages the functions of the entire system. As an interface board, the design focuses on the software design of the driver layer. He includes three aspects:

(1) Software of FPGA part.

(2) The software of DSP part.

(3) PC operating system driver software.

5.1 FPGA Program Control Function

This part is written in VHDL language, which realizes the function of receiving, sending, 1553B bus data, Manchester II code, error detection, parity check, interface with DSP and decoding circuit. The transmitting unit and the receiving unit work in parallel and are implemented by a logic gate circuit.

5.2 DSP program control function

The functions implemented by the DSP control program are as follows:

(1) Initialization of the bus interface board (including initialization of the DSP's internal circuits and registers FPGA and upper computer communication registers).

(2) Realize RT address recognition

Because it is a multi-RT bus interface board, after receiving the data, you should determine whether the RT address belongs to the interface board;

DSP

(3) Message transmission control function with host computer

The message transmission control program completes the data exchange between the bus interface board and the host computer for the data that the bus should transmit. Including the data reading and writing process and self-test process, the operations to be completed are as follows:

① Write and send data to the FPGA (to the bus).

② Read data from the FPGA (the data is processed by the DSP).

③ Write data to the dual-port RAM (to the host computer).

④ Self-testing process. The self-test process is to realize the data sending and receiving performance test of the interface board after receiving the self-test command from the host computer.

(4) Interrupt control program

In the design of the DSP chip TMS320F206 interface, three hardware interrupts are used, INT1 and INT2 are generated by FPGA, and INT3 is generated by the host computer. INT1 indicates that the receiving unit of the FPGA has received a data to notify the F206 reading, INT2 indicates that the receiving unit of the FPGA has received an error data and informs F206 to read the error status information, INT3 is a type of data transmission control of the host computer and the interface board Means, through the INT3 interrupt, the host computer tells the interface board to perform data reception or data transmission operations, how much data to send, the message format used, and bus control information.

The software of the DSP part adopts mixed programming of C ++ and assembly language. The key paths such as interrupt service routines, data sending and receiving programs all adopt assembly language to achieve the maximum execution efficiency. The main program is written in C ++.

5.3 Host computer control program

It mainly implements software driving, data communication and transmission control of the interface board by the host computer under a specific operating system. C ++ is mainly used for software development in the Windows environment.

6.Conclusion

This paper introduces a method for designing and implementing communication software for an aircraft bus system based on FPGA and DSP. In actual application, the communication function of the bus system is well realized, which has certain use and reference value for the study of 1553B bus.

Etichetta: MILSTD1553B
 

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