Low-Voltage 10Bit FET Bus-Exchange Switch 24-TSSOP -40℃ to 85℃
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XC5VFX130T-1FFG1738I Dettagli del prodotto
The Xilinx® Virtex® UltraScale+™ FPGAs are available in -3, -2, -1 speed grades, with -3E devices having the highest performance. The -2LE devices can operate at a VCCINT voltage at 0.85V or 0.72V and provide lower maximum static power. When operated at VCCINT = 0.85V, using -2LE devices, the speed specification for the L devices is the same as the -2I speed grade. When operated at VCCINT = 0.72V, the -2LE performance and static and dynamic power is reduced.
DC and AC characteristics are specified in extended (E), industrial (I), and military (M) temperature ranges. Except the operating temperature range or unless otherwise noted, all the DC and AC electrical parameters are the same for a particular speed grade (that is, the timing characteristics of a -1 speed grade extended device are the same as for a -1 speed grade industrial device). However, only selected speed grades and/or devices are available in each temperature range.
- Absolute Maximum Ratings
- Recommended Operating Conditions
- DC Characteristics Over Recommended Operating Conditions
- Quiescent Supply Current
The recommended power-on sequence is VCCINT, VCCINT_IO/VCCBRAM, VCCAUX/VCCAUX_IO, and VCCO to achieve minimum current draw and ensure that the I/Os are 3-stated at power-on. The recommended power-off sequence is the reverse of the power-on sequence. If VCCINT and VCCINT_IO/VCCBRAM have the same recommended voltage levels, they can be powered by the same supply and ramped simultaneously. VCCINT_IO must be connected to VCCBRAM. If VCCAUX/VCCAUX_IO and VCCO have the same recommended voltage levels, they can be powered by the same supply and ramped simultaneously. VCCAUX and VCCAUX_IO must be connected together. VCCADC and VREF can be powered at any time and have no power-up sequencing requirements.
For devices with HBM, the HBM power supplies can be powered on/off after or in-parallel with the core power supplies. The required power-on sequence is VCCAUX_HBM and VCCINT_IO followed by VCC_HBM/VCC_IO_HBM. VCC_IO_HBM must be connected to VCC_HBM. VCCAUX_HBM must be equal to or higher than VCC_HBM at all times.
The recommended power-off sequence is the reverse of the power-on sequence. The recommended power-on sequence to achieve minimum current draw for the GTY or GTM transceivers is VCCINT, VCCINT_GT, VMGTAVCC, VMGTAVTT OR VMGTAVCC, VCCINT, VCCINT_GT, VMGTAVTT. There is no recommended sequencing for VMGTVCCAUX. Both VMGTAVCC and VCCINT can be ramped simultaneously. When VCCINT and VCCINT_GT have the same recommended operating conditions, VCCINT and VCCINT_GT can be connected to the same power regulation circuit. When VCCINT and VCCINT_GT are connected to separate regulation circuits, VCCINT_GT must be within the recommended operating condition before device configuration.The recommended power-off sequence is the reverse of the power-on sequence to achieve minimum current draw. If these recommended sequences are not met, current drawn from VMGTAVTT can be higher than specifications during power-up and power-down.
- Number of LABs/CLBs
- Number of Logic Elements/Cells
- Total RAM Bits
- Number of I/O
- Voltage Supply
- 0.95V ~ 1.05V
- Mounting Type
- Surface Mount
- Operating Temperature
- -40??C ~ 100??C (TJ)
- Package / Case
- 1738-BBGA, FCBGA
- Supplier Device Package
- 1738-FCBGA (42.5x42.5)
XC5VFX130T User Guide PDF Datasheet
XC5VFX130T-1FFG1738I Related speciale
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alles besens, gerne wieder, Danke
Доставка 22 дня с учетом новогодних праздников и объединения 7 отправлений!! Рекомендую!
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2.If some of the items you received aren't of perfect quality, we would resiponsibly arrange your refund or replacement. But the items must remain their orginal condition.
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If there is something wrong with the XC5VFX130T1FFG1738I we delivered, we will accept the replacement or return of the XC5VFX130T-1FFG1738I only when all of the below conditions are fulfilled:
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More details about return electronic components please see our Return & Change Policy.
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AMD Xilinx, Inc
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- 2.Xilinx FPGA naming conventions
- 3.Xilinx-FPGA DNA reading method
- 4.Xilinx-7Series-FPGA high-speed transceiver use learning
- 5.FPGAs, 3D ICs, and MPSoCs suit LTE Advanced applications
- 6.Development Environment supports SoCs and MPSoCs.
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